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Regular Paper

Automatic Target Description File Generation

State Key Laboratory of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190 China
University of Chinese Academy of Sciences, Beijing 100049, China
School of Computer Science and Engineering, University of New South Wales, Sydney, NSW 2052, Australia
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Abstract

Agile hardware design is gaining increasing momentum and bringing new chips in larger quantities to the market faster. However, it also takes new challenges for compiler developers to retarget existing compilers to these new chips in shorter time than ever before. Currently, retargeting a compiler backend, e.g., an LLVM backend to a new target, requires compiler developers to write manually a set of target description files (totalling 10300+ lines of code (LOC) for RISC-V in LLVM), which is error-prone and time-consuming. In this paper, we introduce a new approach, Automatic Target Description File Generation (ATG), which accelerates the generation of a compiler backend for a new target by generating its target description files automatically. Given a new target, ATG proceeds in two stages. First, ATG synthesizes a small list of target-specific properties and a list of code-layout templates from the target description files of a set of existing targets with similar instruction set architectures (ISAs). Second, ATG requests compiler developers to fill in the information for each instruction in the new target in tabular form according to the list of target-specific properties synthesized and then generates its target description files automatically according to the list of code-layout templates synthesized. The first stage can often be reused by different new targets sharing similar ISAs. We evaluate ATG using nine RISC-V instruction sets drawn from a total of 1029 instructions in LLVM 12.0. ATG enables compiler developers to generate compiler backends for these ISAs that emit the same assembly code as the existing compiler backends for RISC-V but with significantly less development effort (by specifying each instruction in terms of up to 61 target-specific properties only).

Keywords

retargetabilitycompilertarget descriptiontarget backendautomatic generator

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Journal of Computer Science and Technology
Volume 38 Issue 6,
November 2023
Pages 1339-1355
DOI: 10.1007/s11390-022-1919-x
Cite this article:
Geng H-N, Lyu F, Zhong M, et al. Automatic Target Description File Generation. Journal of Computer Science and Technology, 2023, 38(6): 1339-1355. https://doi.org/10.1007/s11390-022-1919-x

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Received: 17 September 2021
Accepted: 06 March 2022
Published: 15 November 2023
© Institute of Computing Technology, Chinese Academy of Sciences 2023
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