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Research Article

Gate controllable spin transistor with semiconducting tunneling barrier

Shuqin Zhang1,2, Renrong Liang1,2( ), Xiawa Wang1,2, Wenjie Chen1,2, Weijun Cheng1,2, Jing Wang1,2, Jun Xu1,2
Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Beijing National Research Center for Information Science and Technology, Tsinghua University, Beijing 100084, China
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Abstract

In this work, we have fabricated a single layer graphene spin transistor on SiO2/Si with a semiconducting tri-layer MoS2 as the tunneling barrier between the ferromagnetic electrodes and the graphene channel. The spin transport in this parallel heterostructure were investigated in detail. The spin switch signal was controlled by tuning the conductivity of MoS2 with different gate voltages. When MoS2 was turned off under negative back gate voltage, the spin switch signal was clearly obtained, whereas it disappeared when MoS2 was conductive under positive back gate bias. This spin transistor showed on, subthreshold and off states when back gate voltage changed from negative to positive. This work exploited a new possibility of semiconducting 2D materials as the tunneling barrier of spin valves.

Keywords

spin transistorsemiconducting tunneling barrierspin signalgate controllable

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Nano Research
Volume 13 Issue 8,
August 2020
Pages 2192-2196
DOI: 10.1007/s12274-020-2832-7
Cite this article:
Zhang S, Liang R, Wang X, et al. Gate controllable spin transistor with semiconducting tunneling barrier. Nano Research, 2020, 13(8): 2192-2196. https://doi.org/10.1007/s12274-020-2832-7
Topics:
GrapheneGraphene transistorsLayered semiconductorsMolybdenum compoundsSemiconducting silicon compounds SilicaSilicon

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Received: 02 April 2019
Revised: 08 June 2019
Accepted: 25 April 2020
Published: 05 August 2020
© Tsinghua University Press and Springer-Verlag GmbH Germany, part of Springer Nature 2020
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