Ultrahigh voltage-gradient ZnO-based varistor ceramics via hybrid cold sintering/spark plasma sintering and post-annealing process

High voltage gradient (V_g) of ZnO-based varistor ceramics is of great importance to realize miniaturization and lightweight of the overvoltage protection devices. However, it is still a challenge to improve the V_g of ZnO-based varistor ceramics using the conventional high-temperature sintering process. Here we present a strategy to fabricate ultrahigh voltage-gradient ZnO-based varistor ceramics using a hybrid cold sintering/spark plasma sintering (CSP-SPS) and post-annealing process. With CSP-SPS, the ZnO-based varistor ceramics were firstly densified at 300 °C, and then annealed at a low temperature of 700–900 °C. The CSP-SPS technology and the low annealing temperature enable the ZnO-based varistor ceramics with a fine and homogeneous microstructure, and inhibits the volatilization of Bi-rich phases at grain boundaries, which produces an ultrahigh V_g of ~1832.71 V/mm, a high nonlinear coefficient (α) of ~106.69, and a low leakage current density (J_L) of less than 0.2 μA/cm². This work shows that combining CSP-SPS with post annealing provides a promising way for designing ZnO-based varistor ceramics with ultrahigh V_g.