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Research Article | Open Access

Vertically integrated security devices with physically unclonable function and random number generation

Jung-Woo Lee1,2,§ ( ), Joon-Kyu Han3,§, Seung-Il Kim1, Ho-Young Maeng1, Seong-Yun Yun1, Joon-Ha Son1, Sang-Won Lee1, Yang-Kyu Choi1 ( )
School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon 34141, Republic of Korea
SK Hynix Inc., Icheon-si 17336, Republic of Korea
System Semiconductor Engineering and Department of Electronic Engineering, Sogang University, Seoul 04107, Republic of Korea

§ Jung-Woo Lee and Joon-Kyu Han contributed equally to this work.

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Graphical Abstract

Three-dimensional (3D)-integrated security chip was realized with random number generation (RNG) and physically unclonable function (PUF).

Abstract

Physically unclonable function (PUF) and random number generation (RNG) are commonly used security tools to protect sensitive information from external threats. This paper presents an approach to implement these tools based on three-dimensional monolithic and vertical integration, combining an overlying transistor for the PUF with an underlying transistor for RNG. The PUF was implemented using a polycrystalline silicon (poly-Si) thin-film transistor (TFT), while RNG was realized with a single crystalline silicon (sc-Si) field-effect transistor (FET). The poly-Si TFT for the PUF generates random keys across multiple devices, exhibiting variation of the threshold voltage due to different grain sizes and boundaries. This approach effectively doubles the encryption key capability by creating mirror bits in the source and drain of the poly-Si TFT. The sc-Si FET for RNG produces random numbers due to the stochastic behavior of iterative single transistor latching and unlatching, passing 15 NIST randomness tests. Integrating both security functions into a single chip can significantly reduce resource overhead in terms of hardware footprint and energy consumption, which is crucial in the era of mobile devices, edge computing, autonomous driving, and the Internet of Things.

Keywords

physically unclonable functiontrue random number generatorpolycrystalline silicon thin-film transistorfield-effect transistormonolithic three-dimensional integrationsecurity

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Nano Research
Volume 18 Issue 1,
January 2025
Article number: 94907045
DOI: 10.26599/NR.2025.94907045
Cite this article:
Lee J-W, Han J-K, Kim S-I, et al. Vertically integrated security devices with physically unclonable function and random number generation. Nano Research, 2025, 18(1): 94907045. https://doi.org/10.26599/NR.2025.94907045
Topics:
Field effect transistors

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Received: 12 July 2024
Revised: 19 September 2024
Accepted: 23 September 2024
Published: 25 December 2024
© The Author(s) 2025. Published by Tsinghua University Press.

This is an open access article under the terms of the Creative Commons Attribution 4.0 International License (CC BY 4.0, https://creativecommons.org/licenses/by/4.0/).
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