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Research Article | Open Access

High-performance trench-structured thin film transistor with a micropatterned double-layer oxide semiconductor of varying thickness

Mookyum Kim1, Ji Cheol Byen2, Doyeon Kim3, Rakesh S. Sharbidre4, Prashant Narute5, Min-Seok Kim1, Seong-Gu Hong1,2,3 ()
Convergence Research Center for Meta-Touch, Korea Research Institute of Standards and Science, Daejeon 34113, Republic of Korea
Department of Applied Measurement Science, University of Science and Technology, Daejeon 34113, Republic of Korea
Division of Chemical and Material Metrology, Korea Research Institute of Standards and Science, Daejeon 34113, Republic of Korea
Physiological Signal Processing and Measurement Solution, Physionics, Daejeon 34027, Republic of Korea
Department of Biomedical Engineering, University of Massachusetts Amherst, Amherst, Massachusetts 01003, USA
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We have developed a novel oxide semiconductor thin film transistor (TFT) architecture featuring a trench-structured oxide semiconductor layer with varying thickness, comprising a thin active segment and thick amplifier segments, along with a corresponding fabrication process. This approach offers superior current-driving capabilities, switching properties, stability, and wafer-scale producibility compared to planar-structured TFTs and previous trench-structured TFTs.

Abstract

Amorphous oxide semiconductor thin film transistors (TFTs) are essential for next-generation high-resolution displays due to their superior electrical properties, stability, and compatibility with flexible substrates. This paper reports a novel TFT architecture featuring a trench-structured oxide semiconductor layer of varying thickness and a corresponding fabrication process, offering excellent current-driving capabilities, switching characteristics, and wafer-scale producibility compared to planar-structured TFTs and previous trench-structured TFTs (TS-TFTs). Our approach forms trenches through micropatterning the first oxide semiconductor layer deposited on the substrate, followed by the deposition of the second oxide semiconductor layer using an atomic layer deposition supercycle method. This process introduces a trench structure, comprising a micropatterned double-layer oxide semiconductor with a thin active segment and thick amplifier segments, between source and drain electrodes. This configuration allows for precise dimensional control of the active segment, facilitating an optimized TFT architecture design. The developed TS-TFTs exhibit excellent electrical properties, including a field-effect mobility of 87.84 cm2·V−1·s−1, a subthreshold swing of 0.074 V·dec−1, near-zero threshold voltage, negligible hysteresis, and a threshold voltage shift of 0.4 V under positive bias stress over 3600 s. Furthermore, an electrical performance analysis of 16 TS-TFTs fabricated on a 4-inch wafer shows that their transfer curves are almost coincident, demonstrating the feasibility of the proposed fabrication process for wafer-scale production.

Keywords

thin film transistortrench structureoxide semiconductorcurrent-driving capabilitiesswitching propertiesscalable fabrication

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Nano Research
Volume 18 Issue 1,
January 2025
Article number: 94907065
DOI: 10.26599/NR.2025.94907065
Cite this article:
Kim M, Byen JC, Kim D, et al. High-performance trench-structured thin film transistor with a micropatterned double-layer oxide semiconductor of varying thickness. Nano Research, 2025, 18(1): 94907065. https://doi.org/10.26599/NR.2025.94907065
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