[1]
B. Y. Xu, K. R. Zhu, M. J. Liu, Y. B. Lin, S. L. Li, X. Y. Tang, N. Sun, and D. Z. Pan, MAGICAL: Toward fully automated analog IC layout leveraging human and machine intelligence: Invited paper, in Proc. 2019 IEEE/ACM Int. Conf. Computer-Aided Design (ICCAD), Westminster, CO, USA, 2019, pp. 1-8.
[2]
W. L. Lyu, P. Xue, F. Yang, C. H. Yan, Z. L. Hong, X. Zeng, and D. Zhou, An efficient Bayesian optimization approach for automated optimization of analog circuits, IEEE Trans. Circ. Syst. I: Reg. Papers, vol. 65, no. 6, pp. 1954-1967, 2018.
[3]
B. Liu, D. X. Zhao, P. Reynaert, and G. G. E. Gielen, GASPAD: A general and efficient mm-wave integrated circuit synthesis method based on surrogate model assisted evolutionary algorithm, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 33, no. 2, pp. 169-182, 2014.
[4]
K. Hakhamaneshi, N. Werblun, P. Abbeel, and V. Stojanovic, BagNet: Berkeley analog generator with layout optimizer boosted with deep neural networks, arXiv preprint arXiv: 1907.10515, 2019.
[5]
E. Chang, J. Han, W. Bae, Z. K. Wang, N. Narevsky, B. NikoliC, and E. Alon, BAG2: A process-portable framework for generator-based AMS circuit design, in Proc. 2018 IEEE Custom Integrated Circuits Conf. (CICC), San Diego, CA, USA, 2018, pp. 1-8.
[6]
R. Phelps, M. Krasnicki, R. A. Rutenbar, L. R. Carley, and J. R. Hellums, Anaconda: Simulation-based synthesis of analog circuits via stochastic pattern search, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 19, no. 6, pp. 703-717, 2000.
[7]
R. A. Vural and T. Yildirim, Analog circuit sizing via swarm intelligence, AEU-Int. J. Electron. Commun., vol. 66, no. 9, pp. 732-740, 2012.
[8]
B. Liu, Y. Wang, Z. P. Yu, L. B. Liu, M. Li, Z. Wang, J. Lu, and F. V. Fernández, Analog circuit optimization system based on hybrid evolutionary algorithms, Integration, vol. 42, no. 2, pp. 137-148, 2009.
[9]
M. J. Liu, K. R. Zhu, J. Q. Gu, L. X. Shen, X. Y. Tang, N. Sun, and D. Z. Pan, Towards decrypting the art of analog layout: Placement quality prediction via transfer learning, in Proc. 2020 Design, Automation & Test in Europe Conf. Exhibition (DATE), Grenoble, France, 2020, pp. 496-501.
[10]
F. Wang, W. Y. Zhang, S. P. Sun, X. Li, and C. J. Gu, Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data, in Proc. 2013 50th ACM/EDAC/IEEE Design Automation Conf., Austin, TX, USA, 2013, pp. 1-6.
[11]
F. Wang, P. Cachecho, W. Y. Zhang, S. P. Sun, X. Li, R. Kanj, and C. J. Gu, Bayesian model fusion: Large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 35, no. 8, pp. 1255-1268, 2016.
[12]
X. Li, J. Y. Le, L. T. Pileggi, and A. Strojwas, Projection-based performance modeling for inter/intra-die variations, in Proc. 2005 IEEE/ACM Int. Conf. Computer-Aided Design, San Jose, CA, USA, 2005, pp. 721-727.
[13]
Z. Feng and P. Li, Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression, in Proc. 2006 IEEE/ACM Int. Conf. Computer-Aided Design, San Jose, CA, USA, 2006, pp. 868-875.
[14]
A. Singhee and R. A. Rutenbar, Beyond low-order statistical response surfaces: Latent variable regression for efficient, highly nonlinear fitting, in Proc. 44th Annu. Design Automation Conf., San Diego, CA, USA, 2007, pp. 256-261.
[15]
X. Li, Finding deterministic solution from underdetermined equation: Large-scale performance variability modeling of analog/RF circuits, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 29, no. 11, pp. 1661-1668, 2010.
[16]
Z. Zhang, K. Batselier, H. T. Liu, L. Daniel, and N. Wong, Tensor computation: A new framework for high-dimensional problems in EDA, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 36, no. 4, pp. 521-536, 2017.
[17]
S. P. Sun, X. Li, and C. J. Gu, Structure-aware high-dimensional performance modeling for analog and mixed-signal circuits, in Proc. IEEE 2013 Custom Integrated Circuits Conf., San Jose, CA, USA, 2013, pp. 1-4.
[18]
F. Tong and S. Liu, Samples selection for artificial neural network training in preliminary structural design, vol. 10, no. 2, pp. 233-239, 2005.
[19]
M. B. Alawieh, S. A. Williamson, and D. Z. Pan, Rethinking sparsity in performance modeling for analog and mixed circuits using spike and slab models, in Proc. 56th Annu. Design Automation Conf., Las Vegas, NV, USA, 2019, p. 65.
[20]
C. M. Bishop, Pattern Recognition and Machine Learning (Information Science and Statistics). New York, NY, USA: Springer-Verlag, 2006.
[21]
W. Y. Zhang, X. Li, F. Liu, E. Acar, R. A. Rutenbar, and R. D. Blanton, Virtual probe: A statistical framework for low-cost silicon characterization of nanoscale integrated circuits, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 30, no. 12, pp. 1814-1827, 2011.
[22]
T. McConaghy, High-dimensional statistical modeling and analysis of custom integrated circuits (invited paper), in Proc. 2011 IEEE Custom Integrated Circuits Conf. (CICC), San Jose, CA, USA, 2011, pp. 1-8.
[23]
C. Tan and G. J, LKLR: A local tangent space-alignment kernel least-squares regression algorithm, Tsinghua Science and Technology, vol. 24, no. 4, pp. 21-31, 2019.
[24]
J. Tao, F. Wang, P. Cachecho, W. Y. Zhang, S. P. Sun, X. Li, R. Kanj, C. J. Gu, and X. Zeng, Large-scale circuit performance modeling by Bayesian model fusion, in Machine Learning in VLSI Computer-Aided Design, I. M. Elfadel, D. S. Boning, and X. Li, eds. Springer, 2019, pp. 403-422.
[25]
X. Li, Finding deterministic solution from underdetermined equation: Large-scale performance modeling by least angle regression, in Proc. 46th Annu. Design Automation Conf., San Francisco, CA, USA, 2009, pp. 364-369.
[26]
X. Li, F. Wang, S. P. Sun, and C. J. Gu, Bayesian model fusion: A statistical framework for efficient pre-silicon validation and post-silicon tuning of complex analog and mixed-signal circuits, in Proc. Int. Conf. Computer-Aided Design, San Jose, CA, USA, 2013, pp. 795-802.
[27]
X. Li, W. Y. Zhang, and F. Wang, Large-scale statistical performance modeling of analog and mixed-signal circuits, in Proc. IEEE 2012 Custom Integrated Circuits Conf., San Jose, CA, USA, 2012, pp. 1-8.
[28]
F. Wang, M. Zaheer, X. Li, J. O. Plouchart, and A. Valdes-Garcia, Co-learning Bayesian model fusion: Efficient performance modeling of analog and mixed-signal circuitsusing side information, in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, Austin, TX, USA, 2015, pp. 575-582.
[29]
M. Alawieh, F. Wang, and X. Li, Efficient hierarchical per-formance modeling for integrated circuits via Bayesian co-learning, in Proc. 54th Annu. Design Automat. Conf., , 2017.
[30]
M. B. Alawieh, F. Wang, and X. Li, Efficient hierarchical performance modeling for analog and mixed-signal circuits via Bayesian co-learning, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 37, no. 12, pp. 2986-2998, 2018.
[31]
M. A. Sovierzoski, F. I. M. Argoud, and F. M. De Azevedo, Evaluation of ANN classifiers during supervised training with ROC analysis and cross validation, in Proc. 2008 Int. Conf. BioMedical Engineering and Informatics, Singapore, 2008, pp. 274-278.
[32]
G. A. Bhatt and P. R. Gandhi, Statistical and ANN based prediction of wind power with uncertainty, in Proc. 2019 3rd Int. Conf. Trends in Electronics and Informatics (ICOEI), Tirunelveli, India, 2019, pp. 622-627.
[33]
J. Y. Goulermas, P. Liatsis, X. J. Zeng, and P. Cook, Density-driven generalized regression neural networks (DD-GRNN) for function approximation, IEEE Trans. Neural Netw., vol. 18, no. 6, pp. 1683-1696, 2007.
[34]
J. L. Chávez-Hurtado and J. E. Rayas-Sánchez, Polynomial-based surrogate modeling of RF and microwave circuits in frequency domain exploiting the multinomial theorem, IEEE Trans. Microw. Theory Tech., vol. 64, no. 12, pp. 4371-4381, 2016.
[35]
S. J. Wang, F. Wang, V. K. Devabhaktuni, and Q. J. Zhang, A hybrid neural and circuit-based model structure for microwave modeling, in Proc. 1999 29th European Microwave Conf., Munich, Germany, 1999, pp. 174-177.
[36]
J. W. Bandler, M. A. Ismail, J. E. Rayas-Sanchez, and Q. J. Zhang, New directions in model development for RF/microwave components utilizing artificial neural networks and space mapping, in Proc. IEEE Antennas and Propagation Society International Symp., Orlando, FL, USA, 1999, pp. 2572-2575.
[37]
A. H. El Zooghby, C. G. Christodoulou, and M. Georgiopoulos, Neural network-based adaptive beamforming for one-and two-dimensional antenna arrays, IEEE Trans. Antennas Propagat., vol. 46, no. 12, pp. 1891-1893, 1998.
[38]
M. Vai, S. C. Wu, B. Li, and S. Prasad, Creating neural network based microwave circuit models for analysis and synthesis, in Proc. 1997 Asia-pacific Microwave Conf., Hong Kong, China, 1997, pp. 853-856.
[39]
F. E. Rangel-Patiño, J. E. Rayas-Sánchez, A. Viveros-Wacher, J. L. Chávez-Hurtado, E. A. Vega-Ochoa, and N. Hakim, Post-silicon receiver equalization metamodeling by artificial neural networks, IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst., vol. 38, no. 4, pp. 733-740, 2019.
[40]
G. Vicario, G. Craparotta, and G. Pistone, Meta-models in computer experiments: Kriging versus artificial neural networks, Qual. Reliab. Eng. Int., vol. 32, no. 6, pp. 2055-2065, 2016.
[41]
G. Thimm and E. Fiesler, High-order and multilayer perceptron initialization, IEEE Trans. Neural Netw., vol. 8, no. 2, pp. 349-359, 1997.
[42]
R. Storn and K. Price, Differential evolution-a simple and efficient heuristic for global optimization over continuous spaces, J. Global Optim., vol. 11, no. 4, pp. 341-359, 1997.
[43]
A. K. Qin, V. L. Huang, and P. N. Suganthan, Differential evolution algorithm with strategy adaptation for global numerical optimization, IEEE Trans. Evolut. Comput., vol. 13, no. 2, pp. 398-417, 2009.