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Research Article

Two-dimensional complementary gate-programmable PN junctions for reconfigurable rectifier circuit

Zhe Sheng1, Yue Wang1, Wennan Hu1, Haoran Sun1, Jianguo Dong1, Rui Yu1, David Wei Zhang1,2, Peng Zhou1,2( ), Zengxing Zhang1,2( )
State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, China
National Integrated Circuit Innovation Center, Shanghai 201203, China
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Graphical Abstract

Based on complementary back-to-back BP/h-BN/graphene heterostructured gate-programmable PN junctions, a reconfigurable rectifier circuit is successfully fabricated to process alternating current (AC) signals with the reconfiguration time less than 25 μs and AC signal frequency prior 1 KHz. The design is like complementary metal-oxide-semiconductor (CMOS) configuration and should be beneficial for voltage output, static power consumption, and large-scale integration.

Abstract

The unique features of ambipolar two-dimensional materials open up a great opportunity to build gate-programmable devices for reconfigurable circuit applications, e.g., PN junctions for rectifier circuits. However, current-reported rectifier circuits usually consist of one gate-programmable PN junction as the rectifier and one resistor as the load, which are not conductive to voltage output and large-scale integration. Here we propose an approach of complementary gate-programmable PN junctions to assemble reconfigurable rectifier circuit, which include two symmetric back-to-back black phosphorus (BP)/hexagonal boron nitride (h-BN)/graphene heterostructured semi-gate field-effect transistors (FETs) and perform complementary NP and PN junction like complementary metal-oxide-semiconductor (CMOS) circuit. The investigation exhibits that the circuit can effectively reconfigure the circuit with/without rectifying ability, and can process alternating current (AC) signals with the frequency prior 1 KHz and reconfiguration speed up to 25 μs. We also achieve the reconfigurable rectifier circuit memory via complementary semi-floating gate FETs configuration. The complementary configuration here should be of low output impedance and low static power consumption, being beneficial for effective voltage output and large-scale integration.

Keywords

two-dimensional (2D) materialPN junctionrectifier circuitcomplementary configuration

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References

[1]

Novoselov, K. S.; Geim, A. K.; Morozov, S. V.; Jiang, D.; Zhang, Y.; Dubonos, S. V.; Grigorieva, I. V.; Firsov, A. A. Electric field effect in atomically thin carbon films. Science 2004, 306, 666–669.
Crossref Google Scholar
[2]

Li, X. X.; Fan, Z. Q.; Liu, P. Z.; Chen, M. L.; Liu, X.; Jia, C. K.; Sun, D. M.; Jiang, X. W.; Han, Z.; Bouchiat, V. et al. Gate-controlled reversible rectifying behaviour in tunnel contacted atomically-thin MoS2 transistor. Nat. Commun. 2017, 8, 970.
Crossref Google Scholar
[3]

Liu, C. S.; Chen, H. W.; Hou, X.; Zhang, H.; Han, J.; Jiang, Y. G.; Zeng, X. Y.; Zhang, D. W.; Zhou, P. Small footprint transistor architecture for photoswitching logic and in situ memory. Nat. Nanotechnol. 2019, 14, 662–667.
Crossref Google Scholar
[4]

Liu, L. W.; Xu, N. S.; Zhang, Y.; Zhao, P.; Chen, H. J.; Deng, S. Z. Van der Waals bipolar junction transistor using vertically stacked two-dimensional atomic crystals. Adv. Funct. Mater. 2019, 29, 1807893.
Crossref Google Scholar
[5]
Liu, C. J.; Wan, Y.; Li, L. J.; Lin, C. P.; Hou, T. H.; Huang, Z. Y.; Hu, V. P. H. 2D materials-based static random-access memory. Adv. Mater., in press, https://doi.org/10.1002/adma.202107894.
[6]

Rasmita, A.; Gao, W. B. Opto-valleytronics in the 2D van der Waals heterostructure. Nano Res. 2021, 14, 1901–1911.
Crossref Google Scholar
[7]

Bertolazzi, S.; Krasnozhon, D.; Kis, A. Nonvolatile memory cells based on MoS2/graphene heterostructures. ACS Nano 2013, 7, 3246–3252.
Crossref Google Scholar
[8]

Vu, Q. A.; Shin, Y. S.; Kim, Y. R.; Nguyen, V. L.; Kang, W. T.; Kim, H.; Luong, D. H.; Lee, I. M.; Lee, K.; Ko, D. S. et al. Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio. Nat. Commun. 2016, 7, 12725.
Crossref Google Scholar
[9]

Liu, C. S.; Yan, X.; Song, X. F.; Ding, S. J.; Zhang, D. W.; Zhou, P. A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications. Nat. Nanotechnol. 2018, 13, 404–410.
Crossref Google Scholar
[10]

Liang, S. J.; Cheng, B.; Cui, X. Y.; Miao, F. Van der Waals heterostructures for high-performance device applications: Challenges and opportunities. Adv. Mater. 2020, 32, 1903800.
Crossref Google Scholar
[11]

Liu, L.; Liu, C. S.; Jiang, L. L.; Li, J. Y.; Ding, Y.; Wang, S. Y.; Jiang, Y. G.; Sun, Y. B.; Wang, J. L.; Chen, S. Y. et al. Ultrafast non-volatile flash memory based on van der Waals heterostructures. Nat. Nanotechnol. 2021, 16, 874–881.
Crossref Google Scholar
[12]
Zhou, Y.; Wang, Y. S.; Zhuge, F. W.; Guo, J. M.; Ma, S. J.; Wang, J. L.; Tang, Z. J.; Li, Y.; Miao, X. S.; He, Y. H. et al. Reconfigurable two-WSe2-transistor synaptic cell for reinforcement learning. Adv. Mater., in press, https://doi.org/10.1002/adma.202107754.
[13]

Fang, H.; Chuang, S.; Chang, T. C.; Takei, K.; Takahashi, T.; Javey, A. High-performance single layered WSe2 p-FETs with chemically doped contacts. Nano Lett. 2012, 12, 3788–3792.
Crossref Google Scholar
[14]
Chau, R.; Kavalieros, J.; Doyle, B.; Murthy, A.; Paulsen, N.; Lionberger, D.; Barlage, D.; Arghavani, R.; Roberds, B.; Doczy, M. A 50 nm depleted-substrate CMOS transistor (DST). In Proceedings International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224), Washington, DC, USA, 2001, pp 29.1.1–29.1.4.
[15]

Lin, Y. F.; Xu, Y.; Wang, S. T.; Li, S. L.; Yamamoto, M.; Aparecido-Ferreira, A.; Li, W. W.; Sun, H. B.; Nakaharai, S.; Jian, W. B. et al. Ambipolar MoTe2 transistors and their applications in logic circuits. Adv. Mater. 2014, 26, 3263–3269.
Crossref Google Scholar
[16]

Zhang, Y. J.; Oka, T.; Suzuki, R.; Ye, J. T.; Iwasa, Y. Electrically switchable chiral light-emitting transistor. Science 2014, 344, 725–728.
Crossref Google Scholar
[17]

Zhang, P. F.; Li, D.; Chen, M. Y.; Zong, Q. J.; Shen, J.; Wan, D. Y.; Zhu, J. T.; Zhang, Z. X. Floating-gate controlled programmable non-volatile black phosphorus PNP junction memory. Nanoscale 2018, 10, 3148–3152.
Crossref Google Scholar
[18]

Resta, G. V.; Balaji, Y.; Lin, D.; Radu, I. P.; Catthoor, F.; Gaillardon, P. E.; De Micheli, G. Doping-free complementary logic gates enabled by two-dimensional polarity-controllable transistors. ACS Nano 2018, 12, 7039–7047.
Crossref Google Scholar
[19]

Hu, W. N.; Sheng, Z.; Hou, X.; Chen, H. W.; Zhang, Z. X.; Zhang, D. W.; Zhou, P. Ambipolar 2D semiconductors and emerging device applications. Small Methods 2021, 5, 2000837.
Crossref Google Scholar
[20]

Pudasaini, P. R.; Oyedele, A.; Zhang, C.; Stanford, M. G.; Cross, N.; Wong, A. T.; Hoffman, A. N.; Xiao, K.; Duscher, G.; Mandrus, D. G. et al. High-performance multilayer WSe2 field-effect transistors with carrier type control. Nano Res. 2018, 11, 722–730.
Crossref Google Scholar
[21]

Das, S.; Demarteau, M.; Roelofs, A. Ambipolar phosphorene field effect transistor. ACS Nano 2014, 8, 11730–11738.
Crossref Google Scholar
[22]

Li, D.; Wang, X. J.; Zhang, Q. C.; Zou, L. P.; Xu, X. F.; Zhang, Z. X. Nonvolatile floating-gate memories based on stacked black phosphorus-boron nitride-MoS2 heterostructures. Adv. Funct. Mater. 2015, 25, 7360–7365.
Crossref Google Scholar
[23]

Wang, Y. R.; Wang, F.; Wang, Z. X.; Wang, J. J.; Yang, J.; Yao, Y. Y.; Li, N. N.; Sendeku, M. G.; Zhan, X. Y.; Shan, C. X. et al. Reconfigurable photovoltaic effect for optoelectronic artificial synapse based on ferroelectric p–n junction. Nano Res. 2021, 14, 4328–4335.
Crossref Google Scholar
[24]

Jariwala, D.; Sangwan, V. K.; Wu, C. C.; Prabhumirashi, P. L.; Geier, M. L.; Marks, T. J.; Lauhon, L. J.; Hersam, M. C. Gate-tunable carbon nanotube-MoS2 heterojunction p–n diode. Proc. Natl. Acad. Sci. USA 2013, 110, 18076–18080.
Crossref Google Scholar
[25]

Li, D.; Chen, M. Y.; Zong, Q. J.; Zhang, Z. X. Floating-gate manipulated graphene-black phosphorus heterojunction for nonvolatile ambipolar schottky junction memories, memory inverter circuits, and logic rectifiers. Nano Lett. 2017, 17, 6353–6359.
Crossref Google Scholar
[26]

Chen, Y.; Yin, C.; Wang, X. D.; Jiang, Y. Y.; Wang, H. L.; Wu, B. M.; Shen, H.; Lin, T.; Hu, W. D.; Meng, X. J. et al. Multimode signal processor unit based on the ambipolar WSe2-Cr schottky junction. ACS Appl. Mater. Interfaces 2019, 11, 38895–38901.
Crossref Google Scholar
[27]

Li, D.; Wang, B.; Chen, M. Y.; Zhou, J.; Zhang, Z. X. Gate­controlled BP-WSe2 heterojunction diode for logic rectifiers and logic optoelectronics. Small 2017, 13, 1603726.
Crossref Google Scholar
[28]

Li, D.; Chen, M. Y.; Sun, Z. Z.; Yu, P.; Liu, Z.; Ajayan, P. M.; Zhang, Z. X. Two-dimensional non-volatile programmable p–n junctions. Nat. Nanotechnol. 2017, 12, 901–906.
Crossref Google Scholar
[29]

Baugher, B. W. H.; Churchill, H. O. H.; Yang, Y. F.; Jarillo-Herrero, P. Optoelectronic devices based on electrically tunable p–n diodes in a monolayer dichalcogenide. Nat. Nanotechnol. 2014, 9, 262–267.
Crossref Google Scholar
[30]

Ross, J. S.; Klement, P.; Jones, A. M.; Ghimire, N. J.; Yan, J. Q.; Mandrus, D.; Taniguchi, T.; Watanabe, K.; Kitamura, K.; Yao, W. et al. Electrically tunable excitonic light-emitting diodes based on monolayer WSe2 p–n junctions. Nat. Nanotechnol. 2014, 9, 268–272.
Crossref Google Scholar
[31]

Zhu, C. G.; Sun, X. X.; Liu, H. W.; Zheng, B. Y.; Wang, X. W.; Liu, Y.; Zubair, M.; Wang, X.; Zhu, X. L.; Li, D. et al. Nonvolatile MoTe2 p–n diodes for optoelectronic logics. ACS Nano 2019, 13, 7216–7222.
Crossref Google Scholar
[32]

Pospischil, A.; Furchi, M. M.; Mueller, T. Solar-energy conversion and light emission in an atomic monolayer p–n diode. Nat. Nanotechnol. 2014, 9, 257–261.
Crossref Google Scholar
[33]

Cheng, R. Q.; Wang, F.; Yin, L.; Wang, Z. X.; Wen, Y.; Shifa, T. A.; He, J. High-performance, multifunctional devices based on asymmetric van der Waals heterostructures. Nat. Electron. 2018, 1, 356–361.
Crossref Google Scholar
[34]

Kong, L. A.; Chen, Y.; Liu, Y. Recent progresses of NMOS and CMOS logic functions based on two-dimensional semiconductors. Nano Res. 2021, 14, 1768–1783.
Crossref Google Scholar
[35]

Zhu, Y.; Sun, X. Q.; Tang, Y. L.; Fu, L.; Lu, Y. R. Two-dimensional materials for light emitting applications: Achievement, challenge and future perspectives. Nano Res. 2021, 14, 1912–1936.
Crossref Google Scholar
[36]

Pan, C.; Wang, C. Y.; Liang, S. J.; Wang, Y.; Cao, T. J.; Wang, P. F.; Wang, C.; Wang, S.; Cheng, B.; Gao, A. Y. et al. Reconfigurable logic and neuromorphic circuits based on electrically tunable two-dimensional homojunctions. Nat. Electron. 2020, 3, 383–390.
Crossref Google Scholar
[37]

Tong, L.; Peng, Z. R.; Lin, R. F.; Li, Z.; Wang, Y. L.; Huang, X. Y.; Xue, K. H.; Xu, H. Y.; Liu, F.; Xia, H. et al. 2D materials-based homogeneous transistor-memory architecture for neuromorphic hardware. Science 2021, 373, 1353–1358.
Crossref Google Scholar
[38]

Chen, H. W.; Xue, X. Y.; Liu, C. S.; Fang, J. B.; Wang, Z.; Wang, J. L.; Zhang, D. W.; Hu, W. D.; Zhou, P. Logic gates based on neuristors made from two-dimensional materials. Nat. Electron. 2021, 4, 399–404.
Crossref Google Scholar
[39]

Mennel, L.; Symonowicz, J.; Wachter, S.; Polyushkin, D. K.; Molina-Mendoza, A. J.; Mueller, T. Ultrafast machine vision with 2D material neural network image sensors. Nature 2020, 579, 62–66.
Crossref Google Scholar
[40]

Zhou, Y.; Ning, J.; Shen, X.; Guo, H. B.; Zhang, C.; Dong, J. G.; Lu, W.; Feng, X.; Hao, Y. An ultrafast quasi-non-volatile semi-floating gate memory with low-power optoelectronic memory application. Adv. Electron. Mater. 2021, 7, 2100564.
Crossref Google Scholar
[41]

Li, L. K.; Yu, Y. J.; Ye, G. J.; Ge, Q. Q.; Ou, X. D.; Wu, H.; Feng, D. L.; Chen, X. H.; Zhang, Y. B. Black phosphorus field-effect transistors. Nat. Nanotechnol. 2014, 9, 372–377.
Crossref Google Scholar
[42]

Zhu, W. N.; Yogeesh, M. N.; Yang, S. X.; Aldave, S. H.; Kim, J. S.; Sonde, S.; Tao, L.; Lu, N. S.; Akinwande, D. Flexible black phosphorus ambipolar transistors, circuits and AM demodulator. Nano Lett. 2015, 15, 1883–1890.
Crossref Google Scholar
[43]

Qiao, J. S.; Kong, X. H.; Hu, Z. X.; Yang, F.; Ji, W. High-mobility transport anisotropy and linear dichroism in few-layer black phosphorus. Nat. Commun. 2014, 5, 4475.
Crossref Google Scholar
[44]

Lu, G. T.; Wei, Y.; Li, X. Z.; Peng, R. X.; Zhang, G. Q.; Mei, Z.; Liang, L.; Liu, K.; Li, Q. Q.; Fan, S. S. et al. Reconfigurable carbon nanotube barristor. Adv. Funct. Mater. 2022, 32, 2107454.
Crossref Google Scholar
[45]

Ielmini, D.; Wong, H. S. P. In-memory computing with resistive switching devices. Nat. Electron. 2018, 1, 333–343.
Crossref Google Scholar
[46]

Liu, C. S.; Chen, H. W.; Wang, S. Y.; Liu, Q.; Jiang, Y. G.; Zhang, D. W.; Liu, M.; Zhou, P. Two-dimensional materials for next-generation computing technologies. Nat. Nanotechnol. 2020, 15, 545–557.
Crossref Google Scholar
[47]
Sze, S. M.; Ng, K. K. Physics of semiconductor devices; John Wiley & Sons: Hoboken, NJ, USA, 2006.
[48]

Wu, J. Y.; Chun, Y. T.; Li, S. P.; Zhang, T.; Chu, D. P. Electrical rectifying and photosensing property of Schottky diode based on MoS2. ACS Appl. Mater. Interfaces 2018, 10, 24613–24619.
Crossref Google Scholar
[49]

Jeon, P. J.; Min, S. W.; Kim, J. S.; Raza, S. R. A.; Choi, K.; Lee, H. S.; Lee, Y. T.; Hwang, D. K.; Choi, H. J.; Im, S. Enhanced device performances of WSe2-MoS2 van der Waals junction p–n diode by fluoropolymer encapsulation. J. Mater. Chem. C 2015, 3, 2751–2758.
Crossref Google Scholar
[50]

Fuhrer, M. S.; Hone, J. Measurement of mobility in dual-gated MoS2 transistors. Nat. Nanotechnol. 2013, 8, 146–147.
Crossref Google Scholar
Nano Research
Volume 16 Issue 1,
January 2023
Pages 1252-1258
DOI: 10.1007/s12274-022-4724-5
Cite this article:
Sheng Z, Wang Y, Hu W, et al. Two-dimensional complementary gate-programmable PN junctions for reconfigurable rectifier circuit. Nano Research, 2023, 16(1): 1252-1258. https://doi.org/10.1007/s12274-022-4724-5
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Thin film circuits

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Received: 10 June 2022
Revised: 01 July 2022
Accepted: 01 July 2022
Published: 11 August 2022
© Tsinghua University Press 2022
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